PCI EXPRESS™ INTERFACES
Core's CESDCX system host board provides two x8 PCI Express links, one x4 PCI Express link and five PCI Express reference clocks routed to edge connectors A and B. These PCI Express links are used on SHB Express™ backplanes to support PCI Express option cards and bridge chips that provide PCI/PCI-X option card support. During system initialization the CESDCX automatically negotiates with the devices connected to the PCI Express links in order to set up communication between these devices. The net result is that the CESDCX system host board supports communication to x1, x4, x8, x16 PCI Express boards and PCI Express switch chips as well as PCI/PCI-X cards via PCI Express-to-PCI/PCI-X bridge technology on the backplane.
PCI EXPRESS™ CONFIGURATION AND BUS SPEED
PCI Express - - Two x8 links, one x4 link
Edge Connector A & B - Five reference clocks
PCI Express - (on-board only) - One x4 link
PCI-X (on-board only) - 64-bit/66MHz
PCI (on-board only) - 32-bit/33MHz
Hub Link 1.5 - 266MB/s
System or FSB - 667MHz
BIOS (FLASH)
The CESDCX uses AMIBIOS8®. The flash BIOS resides in the 82802AC Firmware Hub (FWH). AMIBIOS8 contains features such as:
Support for flash devices for BIOS upgrading via floppy interface
Integrated support for USB mass storage devices such as USB CD-ROM, CD-RW, etc.
Boot from network, USB mass storage devices, IDE or ATAPI
Serial port console redirection to support headless operation (requires optional IOB30)
SATA/ATA/ATAPI support includes 48-bit LBA addressing to support SATA/ATA/IDE hard drive capacities over 137GB
CE-00030/CE-00031 EXPANSION BOARDS (OPTIONAL)
These optional boards provide legacy I/O connections via the Super I/O controller (LPC47B272). The I/O controller on an CE-00030/31 connects to the CESDCX's LPC Bus via the board’s controlled impedance connector. The following I/O interfaces are supported by the CESDCX via either the CE-00030 or CE-00031:
SERIAL INTERFACE
The Super I/O controller supports two full-function serial ports with independently programmable baud rates. The controller has two high-speed, NS16C550 compatible UARTs with Send/Receive 16-byte FIFOs. The IRQ for each serial port has BIOS selectable addressing.
FLOPPY DRIVE INTERFACE
The CE-00030/CE-00031 supports up to two floppy disk drives in combinations of 360K to 2.88MB.
KB AND PS/2 MOUSE INTERFACES
The mini DIN connector located on the I/O bracket provides an external interface for a PS/2 mouse and keyboard. A "Y" adapter plugged into the mini DIN connector allows the PS/2 mouse and keyboard to share the same port. Internal PS/2 mouse and keyboard headers are also available. A self-resetting fuse protects the +5V line of the keyboard and the mouse.
PARALLEL INTERFACE
The parallel port interface is compatible with IBM PC/XT®, PC/AT®, PS/2TM, Enhanced Parallel Port (EPP1.7, EPP1.9) and Extended Capabilities Port (ECP) modes of operation. Both the EPP and ECP modes are IEEE 1284 compliant. The parallel port has BIOS selectable addressing.
Operating systems exhibit certain boot-up behaviors in regards to the handling of keyboard controller functions that may necessitate the addition of the CE-00030 or CE-00031 to the CESDCX.
The operating systems that Core has tested that do not require the CE-00030 or CE-00031 are:
Microsoft® Windows® 2000
Microsoft® Windows® XP (using Service Packs 1, 1A or 2)
Microsoft® Windows® 2003 Server
Microsoft® Windows® NT 4.0
RedHat Linux 9.0
Fedora Linux 9.0
SUSE Linux 9.0
The operating systems that Core has tested that require the CE-00030 or CE-00031 in order to provide required PS/2 keyboard functions are:
Unixware® 7.11
Sun® Solaris™ 9.0
SCO ODT 5.05
Future CESDCX BIOS upgrades may eliminate the need for either the CE-00030 or CE-00031 to provide PS/2 keyboard functionality with additional operating systems. Contact Core for the latest information.
IOB31 EXPANSION BOARD (OPTIONAL)
The CE-00031 supports all of the same I/O functions as the CE-00030 using cable header connectors. There is no I/O plate on the CE-00031. The CE-00031 also provides a x4 PCI Express edge connector designed to fit into a PCI Express expansion slot on a PICMG 1.3 backplane. When used on the CESDCX system host board, the CE-00031 provides an extra x4 PCI Express link to the backplane.
BATTERY
Built-in lithium battery for data retention of CMOS memory.
QUAD USB INTERFACES
The CESDCX supports four high-speed USB 2.0 ports for data transfers up to 480Mbit/sec. It also supports USB 1.1 devices for data transfers at 12 or 1.5Mbit/sec. Two USB 2.0 interface ports are located on the CESDCX’s I/O bracket. Two additional USB 2.0 headers are available on the SHB. The CESDCX supports the optional routing of two of the USB 2.0 interfaces to an SHB Express backplane. Contact Core if your application requires this feature.
WATCHDOG TIMER
The programmable watchdog timer is supported directly by the I/O Controller Hub. Two operating modes, free-running and one-shot, are available with this two-stage watchdog timer. Stage one can generate IRQ, SMI or SCI, and stage two generates a programable watchdog timer reset with a total range of 1ms to 10 minutes.
AGENCY APPROVALS & INDUSTRY COMPLIANCE
Designed for UL60950, CAN/CSA C22.2 No. 60950-00, EN55022:1998 Class B, EN61000-4-2:1995, EN61000-4-3:1997, EN61000-4-4:1995, EN61000-4-5:1995, EN61000-4-6:1996, EN61000-4-11:1994
STANDARDS
- PCI Express Base Specification 1.0a
- SHB Express™ System Host Board PCI Express specification
- PCI Industrial Computer Manufacturers Group (PICMG®) 1.3
MEAN TIME BETWEEN FAILURES (MTBF)
TBD POH (Power-On Hours) at 40 °C., per Bellcore