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CSP3

Intel® Pentium® III PICMG 1.0 SBC

FEATURES
• Intel® Pentium® III or Intel® Celeron® processor
• Low profile processor package
• Speeds up to 1.0GHz
• AGP Super VGA interface
• Ultra Wide SCSI
• 10/100Base-T Ethernet
SPECIFICATION

PROCESSOR
Intel® Pentium® III processor at 600EMHz - 1.0GHz
Intel® Celeron® processor at 433MHz - 850MHz

PROCESSOR PACKAGE
Intel® Pentium® III or Intel® Celeron® processor in a low-profile Socket 370 compatible package

CHIPSET
Intel® 440BX AGPset with the Accelerated Graphics Port (AGP) interface

SYSTEM/MEMORY BUS
Intel® 440BX AGPset supports the system/memory buses at both 66MHz and 100MHz speeds. The 100MHz system/memory buses provide a higher bandwidth path for transferring data between main memory/chip set and the processor.

CONCURRENT PCI
Maximizes system performance with simultaneous processor, PCI and AGP Bus activities. It includes multi-transaction timing, enhanced write performance, a passive release mechanism and support for PCI 2.1 compliant delayed transactions.

DATA PATH
Data/Memory 64-bit
ISA 16-bit
PCI 32-bit
Video 64-bit

BUS SPEED
ISA 8MHz (All Speeds)
PCI 33MHz (All Speeds)
System/Memory 66MHz or 100MHz (Celeron)
100MHz (Pentium III)

BIOS (FLASH)
AMI® Hi-Flex BIOS with built-in advanced CMOS setup for system parameters, peripheral management for configuring on-board peripherals, PCI-to-PCI bridge support, and PCI interrupt steering. Supports flash devices for BIOS upgrading via floppy interface. Custom BIOSs available.

CACHE MEMORY (L2)
Intel® Pentium® III processor - A 256K integrated on-die Advanced Transfer Cache. The cache is 256-bit wide, 8-way set associative cache running at full processor core frequency.
Intel® Celeron® processor - A 128K integrated on-die 64-bit wide, non-blocking cache.

DRAM MEMORY
The SDRAM interface consists of two dual in-line memory module (DIMM) sockets and supports auto detection of memory up to 512MB of Synchronous DRAM (SDRAM) memory. Minimum memory size is 8MB. The DIMM memory is PC-100 compliant for all speeds, which means that they comply with Intel's PC SDRAM specifications. Uses industry standard 64-bit (non-ECC) or 72-bit (ECC) wide gold finger DIMM DRAM in two 168-pin DIMM sockets.

MEMORY HOLE
Supports a 1MB memory hole option at 15-16MB.

ERROR CHECKING AND CORRECTION
The memory interface supports ECC modes via BIOS setting for multiple-bit error detection and single-bit error correction.

PCI LOCAL BUS INTERFACE
Fully compliant with the PCI Local Bus 2.1 Specification. This board has optimized the PCI interface to allow the processor to sustain the highest possible bandwidth (greater than 100MB/sec sustained) and supports PCI-to-PCI bridge technology.

UNIVERSAL SERIAL BUS (USB)
Supports two USB 1.0 ports for serial transfers at 12 or 1.5Mbit/sec. The Universal Serial Bus is an interface allowing for connectivity to many standard PC peripherals via an external port.

SYSTEM HARDWARE MONITOR
Provides monitoring of system voltages, temperature and fan speed.

FLOPPY DRIVE INTERFACE
Supports up to two floppy disk drives in combinations of 360K to 2.88MB.

SPECIFICATION (CONT.)

AGP SUPER VGA INTERFACE
The 69000 video interface is an Accelerated Graphics Port (AGP) device with 2MB of on-chip memory. AGP is designed to off-load the PCI Bus by allowing graphics data to move directly from system memory. The interface supports pixel resolutions up to 1280 x 1024 non-interlaced. Software drivers are available for most popular operating systems.

SERIAL INTERFACE
Two high speed FIFO (16C550) serial ports with independently programmable baud rates. Each serial port has BIOS selectable addressing.

PCI 10/100BASE-T ETHERNET INTERFACE
The PCI Ethernet interface supports 10/100Base-T via an RJ-45 connector on the board's I/O bracket. The interface is compliant with IEEE 802.3 and PCI Local Bus 2.1 Specifications. Link status and activity LEDs are on the I/O bracket. Software drivers are available for most popular operating systems.

PCI ULTRA WIDE SCSI INTERFACE
The SCSI interface is a PCI Bus Master device using the Adaptec AIC-7880 chip. Supports Ultra Wide SCSI operation up to 40MB per second and bursts data to the host at full PCI speeds. Enable/disable active termination is provided with terminator voltage protected by self-resetting fuses. Software drivers are available for most popular operating systems.

PCI EIDE ULTRA DMA/33 INTERFACE (DUAL)
Dual high performance PCI Bus Master EIDE interfaces are capable of supporting up to four IDE Type 4 disk drives in a master/slave configuration. Supports Ultra DMA/33 with synchronous DMA mode transfers up to 33MB per second.

WATCHDOG TIMER
The software controlled watchdog timer monitors system activity and generates a reset pulse in the event of a time-out.

ENHANCED BI-DIRECTIONAL PARALLEL INTERFACE
Compatible with PC/AT bi-directional parallel port and supports EPP and ECP modes. The ECP mode is IEEE 1284 compliant. Parallel port has BIOS selectable addressing.

PS/2 MOUSE INTERFACES
Compatible with a PS/2-type mouse. Accessible via the I/O bracket or off-board cabling. Mouse voltage is protected by a self-resetting fuse.

POWER FAIL DETECTION
Issues a hardware reset when on-board voltage drops below 4.75 volts.

BATTERY
Built-in lithium battery for ten years of data retention for CMOS memory.

POWER REQUIREMENTS
+5V - 8.1 Amps maximum (850MHz)
+12V - < 100 mAmps
-12V - < 100 mAmps

The system power supply must conform to the power sequencing specifications of ATX compliant power supplies. Voltage levels must be regulated within a range of +/- 5%.

TEMPERATURE
Operating 0° - 60° C.
(0° - 55° C. for 700MHz Intel® Pentium® III processor and above)

KEYBOARD INTERFACE
Compatible with AT-type keyboard. Accessible via the I/O bracket or off-board cabling. Keyboard voltage is protected by a self-resetting fuse.

MEAN TIME BETWEEN FAILURE (MTBF)
66,000 POH (Power-On Hours) at 40° C., per MIL-HDBK-217F

AGENCY APPROVALS & INDUSTRY COMPLIANCE
Designed for UL 1950, CAN/CSA C22.22 Number 950-95, EN55022:1994/A2;1997 CLASS A, EN50082-2:1995

STANDARDS
- IEEE P996, Personal Computer Bus Standard
- PCI Local Bus Specification 2.1
- PICMG 1.0 Specification

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