SEBP19-16/2

SERVER-CLASS PCI EXPRESS BACKPLANE
Core System's SEBP19-16/2 is a server-class backplane that enables the maximum number of high-bandwidth; i.e x4 or greater, PCI Express links from the System Host Board to the backplane's PCI Express option card slots and devices.

PCI EXPRESS SERIAL SLOTS
PCIE2 is a x16 slot connected to the SHB with a x8 PCI Express link. PCIE2 mechanically supports x16, x8, x4 and x1 PCI Express cards. PCIE1 is a x8 slot driven by a x4 link and supports x8, x4 and x1 PCI Express cards. The actual speed of a PCI Express connection to an option card slot is determined by the SHB's PCI Express link configuration and the auto-negotiation/link training features of PCI Express.

SHB SLOT
Accepts an SHB Express (PICMG® 1.3) compliant (server-class) processor such as Core's current CEDX, CESX and future CEDCX, CESDCX system host boards.

PCI-X PARALLEL BUS SLOTS
The sixteen PCI-X slots on the SEBP19-16/2 are connected to the SHB via two x4 PCI Express links that each drive a PCI Express-to-PCI-X bridge chip. Each bridge chip provides two 64-bit/66MHz PCI-X channels to support option card slots A1 through D4. PCI-X and universal (i.e. 5V/3.3V combo or 3.3V only) PCI option cards may be used and the bridge chips will throttle-down the bus interface speeds to match any universal PCI or PCI-X card with an interface bus speed less than 66MHz

OPTIONAL USB 2.0 INTERFACES
The SHB Express specification defines optional I/O routings from the SHB to the backplane. Core's SEBP19-16/2 takes advantage of this new specification feature by providing two USB 2.0 headers capable of providing up to four USB 2.0 backplane ports. The Core CEDX/CESX System Host Board supports two USB ports with a factory installed option. Contact Core if you are interested in this optional CEDX/CESX functionality.

OPTIONAL ETHERNET INTERFACES
Core's BPX6571 backplane supports the optional Ethernet routing feature of the SHB Express (PICMG 1.3) specification. Two 10/100/1000Base-T Ethernet RJ-45 connectors are available for use on the backplane. Data communication performance of the backplane's Ethernet interfaces depends on the Ethernet controller hardware and configuration on the system host board. Consult your SHB Ethernet interface implementation method for details.

POWER CONNECTORS
The SEBP19-16/2 backplane is available with a low-profile, right angle power connector suitable for use with either an ATX or EPS power supply.

EXTENDED-CURRENT TERMINAL BLOCKS
Three extended-current terminal blocks provide additional power capacity for power-intensive applications -- up to 80 Amps of +12V, 120 Amps of +3.3V and 80 Amps of +5V.

POWER INDICATORS
Surface-mount LEDs provide a convenient visual check for +5V, -5V, +5V AUX,+12V, -12V and +3.3V power connection and status. CAUTION: Never install or remove the SHB or any option card from the BPX6571 backplane if the +5V AUX LED is GREEN. If the system appears to be off and the+5V AUX LED is GREEN then you need to remove or turn-off the incoming power to the system power supply.

AUXILIARY POWER CONNECTOR
The +12V power connector is a right angle connector on the SEBP19-16/2 used for routing auxiliary power to the SHB's edge connectors. This new capability of PICMG 1.3 compliant SHBs and backplanes eliminates the need for auxiliary power connections on the system host board.

PRINTED CIRCUIT LAYERS
The backplane is a six-layer, .080" thick board with three separate signal layers: +5V/+12V, +3.3V and ground. Multi-layer backplane construction provides excellent noise immunity.

CONNECTING POWER
The combination of new power supply technologies, soft-power control signals available via the Advanced Configuration and Power Interface (ACPI) now supported by PICMG 1.3 SHBs and auxiliary power connectors on PICMG 1.3 backplanes that deliver all of the SHBs power to the edge connectors are requiring a different approach to connecting system power.

Auxiliary power connectors on the backplane are provided to help improve system Mean Time To Repair (MTTR). All power can be delivered to the SHB via the board's edge connectors. Core's PICMG 1.3 SHBs and backplane SHB edge connector slots have ample power pins available to meet the power demands of high-performance, dual processor SHBs like the Core CEDX. The ATX/EPS and +12V power connectors on the SEBP19-16/2 backplane also have an ample number of power pins available to meet these demands. The system designer needs to be aware of the potential power demands of the entire system including the particular SHB to ensure that both the power supply and the power connectors in the cable harness can safely deliver the necessary power to drive the entire system.

Specific implementations of ACPI signals, ATX/EPS power supply type and the operating system software will determine the specific connection method for the power supply.

ACPI signal usage is optional and may be turned off using the SHBs BIOS and/or signal jumpers. Specific power connections and BIOS parameters will differ according to unique system design requirements. Refer to the Appendix B (Power Connection) and Advanced Setup BIOS sections of the Core CEDX/CEXS Technical Reference Manual for more information.