SEBP7-3/3

SERVER CLASS PCI EXPRESS™ BACKPLANE
Core’s SEBP7-3/3 is a server-class backplane.  A server-class backplane enables the maximum number of high-bandwidth, i.e, x4 or greater, PCI Express™ links from the System Host Board to the backplane’s PCIe option card slots.

SHB SLOT 
Accepts an SHB Express™ (PICMG 1.3) compliant processor.  Core’s CEDX/CESX, SLT/SLI and CEDQCX-series system host boards (SHBs) are examples of compliant PICMG 1.3 processors. The SEBP7-3/3 is optimized to fully utilize all available PCI Express links from server-class SHBs.

PCI EXPRESS SERIAL SLOTS
Two PCI Express slots (slots PCIe1 and PCIe2) on the SEBP7-3/3 are x8 slots that mechanically support x8, x4 and x1 PCI Express cards. PCI Express option card slot PCIe2 is driven directly by the SHB via a x8 PCI Express link (A2) from the server-class SHB and PCIe1 uses the x4 PCIe link provided by the SHB via a Core IOB31 I/O expansion board. The C-0031 is attached to the SHB and connects to the backplane’s PCIeS slot. 

PCIe3 is a x16 PCI Express mechanical slot that is driven by a x8 PCI Express link (A0) from the SHB. This slot mechanically supports x16, x8, x4 and x1 PCI Express option cards.

The actual speed of a PCI Express connection to an option card slot is determined by the SHB’s PCI Express link configuration and the auto-negotiation/link training features of PCI Express.

PCI-X/PCI PARALLEL BUS SLOTS
Three PCI-X slots (SLTA1 , SLTB1 and SLTB2 ) on the SEBP7-3/3 are connected to the SHB via a x4 PCI Express link (B0) via a PCI Express-to-PCI-X bridge chip. The bridge chip supports SLTA1 with a 64-bit/133MHz PCI-X interface and SLTB1 and SLTB2 with a 64-bit/100MHz PCI-X interface. These slots support PCI-X and universal PCI option cards, (i.e. 5V/3.3V combo or 3.3V only). The bridge chip will throttle-down the bus interface speed to match any card that has a speed capability less than the supported bus interface speed of a specific PCI-X backplane slot.

OPTIONAL USB 2.0 INTERFACES
The SHB Express specification defines optional I/O routings from the SHB to the backplane. Core’s SEBP7-3/3 takes advantage of this new specification feature by providing two USB 2.0 headers capable of providing up to four USB 2.0 backplane ports.

OPTIONAL ETHERNET INTERFACE
Core’s SEBP7-3/3 backplane supports the optional Ethernet routing feature of the SHB Express (PICMG 1.3) specification. One 10/100/1000Base-T Ethernet RJ-45 connector is available for use on the backplane. The SHB OPTIONAL BACKPLANE I/O SUPPORT TABLE explains the backplane I/O capabilities supported by Core’s PICMG 1.3 System Host Boards.

POWER CONNECTORS
The standard SEBP7-3/3 backplane is available with a low-profile right-angle power connector suitable for use with either an ATX  or EPS power supply.  An optional SEBP7-3/3 is available with straight-in or vertical power connectors. Using straight-in power connectors may interfere with a full-length option card placed in the SLTB1 slot.

POWER INDICATORS
Surface-mount LEDs provide a convenient visual check for +5V,  -5V, +5V AUX,+12V, -12V and +3.3V power connection and status. CAUTION: Never install or remove the SHB or any option card from the SEBP7-3/3 backplane if the +5V AUX LED is GREEN.  If the system appears to be off and the+5V AUX LED is GREEN, you need to remove or turn off the incoming power to the system power supply.

AUXILIARY POWER CONNECTOR
The +12V power connector on the SEBP7-3/3 provides for routing auxiliary power to the SHB’s edge connectors.  This new capability of PICMG 1.3 compliant SHBs and backplanes eliminates the need for auxiliary power connections on the system host board.

CONNECTING POWER
A new approach is required to connect system power due to the combination of new power supply technologies and the soft-power control signals available via the Advanced Configuration and Power Interface (ACPI). ACPI signals are now supported by PICMG 1.3 SHBs and backplanes. Auxiliary power connectors located on the PICMG 1.3 backplanes now deliver all of the power directly to the edge connectors of the SHB.

Auxiliary power connectors on the backplane are provided to help improve system Mean Time To Repair (MTTR).  All power can be delivered to the SHB via the board’s edge connectors.  Core’s PICMG 1.3 SHBs and backplane SHB edge connector slots have ample power pins available to meet the power demands of high-performance dual-processor SHBs. The ATX/EPS and +12V power connectors on the SEBP7-3/3 backplane also have an ample number of power pins available to meet these demands. The system designer needs to be aware of the potential power demands of the entire system, including the particular SHB, to ensure that both the power supply and the power connectors in the cable harness can safely deliver the necessary power to drive the entire system.

Specific implementations of ACPI signals, ATX/EPS power supply type and the operating system software will determine the specific connection method for the power supply

ACPI signal usage is optional and may be turned off using the SHB’s BIOS and/or signal jumpers. Specific power connections and BIOS parameters will differ depending on unique system design requirements. Refer to the Appendix B (Power Connection) and Advanced Setup BIOS sections found in the Technical Reference Manual for your specific Core system host board for more information.