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CEDDCX
Dual Core Intel® Dual Xeon® SHB
 
FEATURES
• Dual-Core Intel® Xeon® Processor LV 2.0GHz and the Intel® E7520 chipset
• Four processor execution cores per CPU
• Advanced power management enables superior processor performance per watt and a passive heat sink cooling solution
• Compatible with the SHB Express™ (PICMG® 1.3) specification
• Supports dual channel DDR2-400 memory, 8GB maximum
• Dual Gigabit Ethernet, dual Serial ATA/150 and dual USB 2.0 ports
• Supports PCI Express, PCI-X and PCI option cards


PROCESSOR
Dual-Core Intel® Xeon® Processor LV 1.66GHz to 2.0GHz*
Processor Package: Micro-FCPGA (478-pin)
 *Higher speeds as available

 

CHIPSET
The CEDDCX uses the Intel® E7520 chipset featuring Symmetric Multiprocessing Protocol for two processors operating on the 667Mz system bus and a dual channel DDR2-400 memory interface. Three x8 PCI Express interfaces are supported by the CEDDCX’s chipset. See the PCI Express Interfaces section for details on how the CEDDCX implements PCI Express. The Intel® E6300ESB I/O Controller Hub supports the CEDDCX’s dual Serial ATA/150 ports, four USB 2.0 interfaces, dual Ultra ATA/100 interfaces and the video and Ethernet controllers. The I/O Controller Hub’s LPC interface is routed to the board’s controlled impedance connector and supports an optional I/O expansion board (Core’s CE-00030) for legacy I/O and serial port communications. The optional CE-00031 expansion board supports legacy I/O via header connectors and provides an additional x4 PCI Express link to a PICMG 1.3 backplane. Communications between the Intel® E7520 Memory Controller Hub and the I/O Controller Hub occurs over a 266MB/s Hub Interface.

 

DUAL ETHERNET INTERFACES - 10/100/1000BASE-T
The CEDDCX’s Gigabit Ethernet Controller (Intel® 82546EB) connects to the I/O Controller Hub via a PCI-X 64-bit/66MHz interface to provide high-speed 10/100/1000Base-T Ethernet interfaces on LAN ports 1 and 2. RJ-45 connectors, located on the I/O bracket, provide the physical interface to the Ethernet network.

 

DUAL SERIAL ATA/150 PORTS
The primary and secondary Serial ATA (SATA) ports on the CEDDCX boards comply with the SATA 1.0 specification and support two independent SATA storage devices such as hard disks and CD-RW devices. SATA technology provides lower pin counts, reduced signaling voltages, simplified cabling, CRC error detection and hot-plug support. SATA produces higher performance interfacing by providing data transfer rates up to 150MB per second on each port.

 

CACHE MEMORY (L2 AND L1)
The Dual-Core Intel® Xeon® Processor LV 2.0GHz has a level two (L2) cache memory that is an integrated on-die Advanced Transfer Cache memory and is 8-way set associative with ECC to run at the full processor core frequency. The L2 cache memory size of 2MB is shared by the two processor cores.

The Dual-Core Intel® Xeon® Processor LV 2.0GHz also features 32KB level one (L1) instruction and data caches.

 

DDR2-400 MEMORY
The four DIMM sockets on the CEDDCX support a total memory capacity of 8GB and the DDR2 memory interface can operate as either a single-channel or dual-channel interface. The theoretical maximum memory bandwidth for single-channel operation is 3.2GB/s and 6.4GB/s for dual-channel mode. Each of the channels (A and B) terminates in two dual in-line memory module (DIMM) sockets. The System BIOS automatically detects memory type, size and speed. The memory modules used on the CEDDCX must be PC2-3200 compliant. The CEDDCX supports a DDR2-400 memory interface speed. Modules with a faster memory speed may be used; however, they will be automatically clocked down to the DDR2-400 memory interface speed by the System BIOS and the SHB’s memory interface components.

 

DDR2-400 MEMORY DIMM SLOT POPULATION
DDR2-400 memory modules are available as either single rank or dual rank DIMMs. A rank refers to the 72-bit unit of devices or DRAM chips that make up the PC2-3200 ECC registered 240-pin DDR2-400 DIMM. Single or dual rank memory modules must be placed in the CEDDCX's DIMM sockets using prescribed population rules to ensure proper memory interface operation and performance.

 

ULTRA XGA VIDEO INTERFACE
The CEDDCX is equipped with the third generation ATI® RAGE™ MOBILITY™ M1 video controller. The M1 enables 2D/3D video acceleration and provides 8MB of integrated video memory. In 2D mode the video controller supports pixel resolutions up to 1600 x 1200, and in 3D mode the maximum resolution provided is 1280 x 1024. The maximum color depth supported at these extremes is 16.7 million colors. Software drivers are available for popular operating systems.

 

POWER REQUIREMENTS
Typical Values - 100% Stressed via MS Windows HCT’s System Stress
CPU         +5V    +12V   +3.3V
1.66GHz  3.00A  3.20A  3.25A
2.0GHz    3.00A  4.20A  3.25A
-12V @ <100mA

Typical Values - System Idling In Windows XP Desktop
CPU        +5V     +12V   +3.3V
1.66GHz  3.00A  1.70A  3.00A
2.0GHz    3.00A  2.10A  3.00A
-12V @ <100mA
Tolerance for all voltages is +/- 5% and must be applied by the PICMG 1.3 backplane to edge connector C.

 

TEMPERATURE/ENVIRONMENT
Operating Temperature:  -0° to 60° C.
Airflow Requirement: 350LFM continuous airflow when using the passive heat sink
Storage Temperature:  -40° to 70° C.
Humidity: 5% to 90% non-condensing
The Dual-Core Intel® Xeon® LV 2.0GHz processors used on the CEDDCX have a Thermal Design Power (TDP) rating of 31Watts. The processor's low TDP rating enables the CEDDCX's passive cooling solution.

 

MECHANICAL
PASSIVE COOLING The CEDDCX has a board stack-up height of .76" (1.93cm) with the SHB's passive heat sink cooling solution. Airflow of at least 350LFM must always be present across the SHB's passive heat sink. The CEDDCX's overall dimensions are 13.3" L (33.78cm) x 4.976" H (12.64cm) x .76" W (1.93cm).

ACTIVE COOLING The CEDDCX's optional active cooling solution has a cooling fan mounted on each CPU's passive heat sink resulting in a board stack-up height of 2.3" (5.84cm). Order the CEDDCX with active cooling when 350LFM or more of airflow is not available for the processors.

Note: The PICMG 1.3 board height specification is approximately .176" (4.47mm) taller than the PICMG 1.0 specification. However, relative PICMG 1.3 board height off the backplane is the same due to the shorter edge connectors of a PICMG 1.3 system host board and the shorter PCI Express connectors on a PICMG 1.3 backplane.


 

PCI EXPRESS™ INTERFACES
Core’s CEDDCX system host board provides two x8 PCI Express links, one x4 PCI Express link and five PCI Express reference clocks routed to edge connectors A and B. These PCI Express links are used on SHB Express™ backplanes to support PCI Express option cards and bridge chips that provide PCI/PCI-X option card support. During system initialization the CEDDCX automatically negotiates with the devices connected to the PCI Express links in order to set up communication between these devices. The net result is that the CEDDCX system host board supports communication to x1, x4, x8, x16 PCI Express boards and PCI Express switch chips as well as PCI/PCI-X cards via PCI Express-to-PCI/PCI-X bridge technology on the backplane.

 

PCI EXPRESS™ CONFIGURATION AND BUS SPEED
PCI Express - - Two x8 links, one x4 link
Edge Connector A & B  - Five reference clocks
PCI Express - (on-board only)  - One x4 link
PCI-X (on-board only)  - 64-bit/66MHz
PCI (on-board only)  - 32-bit/33MHz
Hub Link 1.5  - 266MB/s
System or FSB  - 667MHz

 

BIOS (FLASH)
The CEDDCX uses AMIBIOS8®. The flash BIOS resides in the 82802AC Firmware Hub (FWH). AMIBIOS8 contains features such as:
Support for flash devices for BIOS upgrading via floppy interface
Integrated support for USB mass storage devices such as USB CD-ROM, CD-RW, etc.
Boot from network, USB mass storage devices, IDE or ATAPI
Serial port console redirection to support headless operation (requires optional CE-00030)
SATA/ATA/ATAPI support includes 48-bit LBA addressing to support SATA/ATA/IDE hard drive capacities over 137GB

 

CE-00030/CE-000B31 EXPANSION BOARDS (OPTIONAL)
These optional boards provide legacy I/O connections via the Super I/O controller (LPC47B272). The I/O controller on an CE-00030/00031 connects to the SLT’s LPC Bus via the board’s controlled impedance connector. The following I/O interfaces are supported by the CEDDCX via either the CE-00030 or CE-00031:

 

SERIAL INTERFACE
The Super I/O controller supports two full-function serial ports with independently programmable baud rates. The controller has two high-speed, NS16C550 compatible UARTs with Send/Receive 16-byte FIFOs. The IRQ for each serial port has BIOS selectable addressing.

 

FLOPPY DRIVE INTERFACE
The CE-00030/CE-00031 supports up to two floppy disk drives in combinations of 360K to 2.88MB.

 

KB AND PS/2 MOUSE INTERFACES
The mini DIN connector located on the I/O bracket provides an external interface for a PS/2 mouse and keyboard. A "Y" adapter plugged into the mini DIN connector allows the PS/2 mouse and keyboard to share the same port. Internal PS/2 mouse and keyboard headers are also available. A self- resetting fuse protects the +5V line of the keyboard and the mouse.

 

PARALLEL INTERFACE
The parallel port interface is compatible with IBM PC/XT®, PC/AT®, PS/2TM, Enhanced Parallel Port (EPP1.7, EPP1.9) and Extended Capabilities Port (ECP) modes of operation. Both the EPP and ECP modes are IEEE 1284 compliant. The parallel port has BIOS selectable addressing.
Operating systems exhibit certain boot-up behaviors in regards to the handling of keyboard controller functions that may necessitate the addition of the CE-00030 or CE-00031 to the CEDDCX.

The operating systems that Core has tested that do not require the CE-00030 or CE-00031 are:
Microsoft® Windows® 2000
Microsoft® Windows® XP
Microsoft® Windows® 2003 Server
Microsoft® Windows® NT 4.0
RedHat Linux 9.0
Fedora Linux 9.0
SUSE Linux 9.0
The operating systems that Core has tested that require the CE-00030 or CE-00031 in order to provide required PS/2 keyboard functions are:
Unixware® 7.11
Sun® Solaris™ 9.0
SCO ODT 5.05

 

CE-00031 EXPANSION BOARD (OPTIONAL)
The CE-00031 supports all of the same I/O functions as the IOB30 using cable header connectors. There is no I/O plate on the CE-00031. The CE-00031 also provides a x4 PCI Express edge connector designed to fit into a PCI Express expansion slot on a PICMG 1.3 backplane. When used on the CEDDCX system host board, the CE-00031 provides an extra x4 PCI Express link to the backplane.

 

BATTERY
Built-in lithium battery for data retention of CMOS memory.

 

QUAD USB INTERFACES
The CEDDCX supports four high-speed USB 2.0 ports for data transfers up to 480Mbit/sec. It also supports USB 1.1 devices for data transfers at 12 or 1.5Mbit/sec. Two USB 2.0 interface ports are located on the CEDDCX's I/O bracket. Two additional USB 2.0 headers are available on the SHB. The CEDDCX supports the optional routing of two of the USB 2.0 interfaces to an SHB Express backplane. Contact Core if your application requires this feature.

 

WATCHDOG TIMER
The programmable watchdog timer is supported directly by the I/O Controller Hub. Two operating modes, free-running and one-shot, are available with this two-stage watchdog timer. Stage one can generate IRQ, SMI or SCI, and stage two generates a programable watchdog timer reset with a total range of 1ms to 10 minutes.

 

AGENCY APPROVALS & INDUSTRY COMPLIANCE
Designed for UL60950, CAN/CSA C22.2 No. 60950-00, EN55022:1998 Class B, EN61000-4-2:1995, EN61000-4-3:1997, EN61000-4-4:1995, EN61000-4-5:1995, EN61000-4-6:1996, EN61000-4-11:1994

 

STANDARDS
- PCI Express Base Specification 1.0a
- SHB Express™ System Host Board PCI Express specification
- PCI Industrial Computer Manufacturers Group (PICMG®) 1.3

 

MEAN TIME BETWEEN FAILURES (MTBF)
202,065 POH (Power-On Hours) at 40 °C., per Bellcore

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